1. Field of the Invention
The present invention relates to an active matrix panel using thin film transistors (TFTs).
2. Description of the Related Art
FIG. 12 shows a conventional active matrix panel. In an active matrix panel 12001, as disclosed in Japanese Patent unexamined published No. 1-289917, a source line driver circuit 12002, a gate line driver circuit 12003, and a pixel matrix 12004 are formed on the same (single) substrate.
The source line driver circuit 12002 has a shift register 12005 and a sample holding circuit 12006 formed by TFTs and is connected to the pixel matrix 12004 through a source line 12007. The gate line driver circuit 12003 has a shift register 12008 and a buffer circuit 12009 and is connected with the pixel matrix 12004 through a gate line 12010. In the pixel matrix 12004, a pixel 12012 is formed at a intersection of the source line 12007 and the gate line 12010 and has a TFT 12013 and a liquid crystal cell 12014. FIG. 13 shows a system for processing image data stored in a memory device such as a random access memory (RAM) using a software by a microcomputer. This system has a liquid crystal display device 13001, a digital signal/analog signal converting circuit (D/A converting circuit) 13002, an image data memory device 13003, an image processing system 13004 including microcomputer (not shown), a data bus 13005, and an address bus 13006. Numeral 13007 represents a memory device control signal; numeral 13008 represents a control signal for the liquid crystal display device 13001; and the D/A converting circuit is shown at 13002.
The operation is described below. The contents of image processing are programmed by C language or the like and then compiled in the system 13004. In accordance with the contents of the image processing, the image data stored in the memory device 13003 is read out on the data bus 13005, and then data processing is performed by the system 13004. The processed image data is stored in the memory device 13003 or displayed on the liquid crystal display device 13001 through the DA converting circuit 13002. Thus, the only function for the liquid crystal display device 13001 is displaying the image data.
In a conventional active matrix panel, there are the following problems.
(1) Miniaturization of a display device and system is hindered.
Conventionally, as shown in FIG. 12, since an active matrix panel has only a circuit for driving each pixel in a pixel matrix, access to a circuit for displaying the pixel circuit, and in particular an image processing system, is performed from an external of the active matrix panel. Recently, because of the increase of image data and the complication of data processing, processing in an external has increased, so that the amount of the data processing exceeds the processing capacity of the microprocessing unit (MPU). Accordingly, in order to decrease the amount of data processing of the MPU, an exclusive external processing unit is incorporated in a semiconductor integrated circuit. However, this increases the number of parts for an image display apparatus having image processing operation and hinders miniaturization of a system.
(2) A region which is not used is present in a panel.
Since a conventional active matrix panel includes driver circuits for pixels, gate lines and source lines, a region which is not used is present in a panel. If an external part can be arranged in the region, further miniaturization of a display system can be performed by effectively using a physical space.
(3) A high speed operation of a system for performing image processing is prevented.
In order to control pixels, it is necessary to operate an MPU in a system other than a panel. However, since the image processing technique becomes more complex year by year and therefore software increase and becomes more complex data processing time of an MPU is increased and access time to a memory device is also increased. This is because an MPU ensures a data bus to access the memory device. To solve this, problem it is effective to perform parallel processing by using a special purpose hardware. However, the number of parts increases. By this, a system cannot be operated at a high speed, so that the process time of a MPU is further increased.
An object of the present invention is to solve the above problems and to provide an active matrix panel having a high speed with miniaturization.
According to the present invention, there is provided an active matrix panel including: a first transparent substrate; a second transparent substrate arranged opposite to the first transparent substrate; a liquid crystal material arranged between the first and second transparent substrate, wherein the first transparent substrate includes, a plurality of gate lines, a plurality of source lines, a plurality of pixel thin film transistors formed in intersections of the gate lines and the source lines, a gate line driver circuit which is formed by first thin film transistors and connected to the gate lines, a source line driver circuit which is formed by second thin film transistors and connected to the source line, and a processing circuit, formed by the third thin film transistors, for processing signals supplied to the source lines.
The processing circuit has at least one of the following elements:
(1) a standard clock generator circuit including a P-type, an N-type or a complementary type MOS transistor formed using a silicon film, or a thin film diode of MIM (metal-insulator metal), NIN, PIP, PIN, NIP or the like;
(2) a counter circuit including a P-type, an N-type or a complementary type MOS transistor formed using a silicon film, or a thin film diode of MIM (metal-insulator metal), NIN, PIP, PIN, NIP or the like;
(3) a divider circuit including a P-type, an N-type or a complementary type MOS transistor formed using a silicon film, or a thin film diode of MIM (metal-insulator metal), NIN, PIP, PIN, NIP or the like;
(4) a transferring element circuit for transferring a signal from external to the active matrix panel, including a P-type, an N-type or a complementary type MOS transistor formed using a silicon film, or a thin film diode of MIM (metal-insulator metal), NIN, PIP, PIN, NIP or the like;
(5) a transferring element circuit for transferring a signal from the active matrix panel to the external, including a P-type, an N-type or a complementary type MOS transistor formed using a silicon film, or a thin film diode of MIM (metal-insulator metal), NIN, PIP, PIN, NIP or the like; and
(6) a transferring element circuit for transferring a signal from the active matrix panel to external and transferring a signal from the external to the active matrix panel, including a P-type, an N-type or a complementary type MOS transistor formed using a silicon film, or a thin film diode of MIM (metal-insulator metal), NIN, PIP, PIN, NIP or the like.
In the above structure of the present invention, the image data is read out from a plurality of memory devices for storing image data under readout control and then processed, so that the processed image data is transferred to pixels to display the image data on the pixels. That is, in the active matrix panel, a pixel matrix is driven, and processing, signal transfer from the active matrix panel to the external, and control of memory devices can be performed.
Therefore, without operation of an MPU, image data is processed and displayed on the pixel matrix by direct accesses to the plurality of memory devices, and the number of parts for data processing can be small.